ITTC Project


Plasma Research Laboratory

Project Award Date: 0000-00-00



Description

The Plasma Research Laboratory (PRL) is developing new reactive ion etching (RIE) processes for semiconductor device improvement. We have recently developed a through-the-wafer slot via hole etch process for GaAs based HEMTs and MMICs. The use of small RIE slot vias to connect to each individual source contact has been shown to result in an increased packing density (smaller chip area), lower source inductance (eliminates the need for source airbridges), more uniform heat distribution, and increased gain and efficiency. Via holes are etched from the back of the thinned wafer to the front of the devices, then metalized to provide ground for source contacts. These slot vias require very high aspect ratios; vias are typically on the order of 20 x 60 m2 or smaller on a 50-micron-thick substrate. An optimum via hole etching process using a Plasma Therm 790 RIE system was determined to be 300V bias voltage, gas flow ratio of Cl2:BCl3:Ar $&$ 4:3:10, and chamber pressure of 15 mTorr. The average etch time for 20 m wide x 60 m long vias on a 50-micron-thick, three-inch-diameter wafer is 180 minutes using a total flow rate of 50 sccm, which corresponds to an average etch rate of 0.3 m/min. This process has been succesfully implemented on K and Ka band HEMT power amplifiers fabricated by TRW.


Investigators




Project Sponsors


Primary Sponsor(s): National Science Foundation, Kansas Technology Enterprise Corporation, TRW, TriQuint, The University of Kansas


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