ITTC Project

Project Summary: Reconfigurable Computing Cluster

Project Award Date: 03-10-2006


Petascale computing will have far-reaching impacts on science, humanity, and industry. However, to be a viable solution, the system must be cost-effective. Although commodity clusters are becoming ubiquitous and are extremely cost-effective, several challenges will impede their ability to scale up to the PetaFLOP range. Certainly, total system cost is a barrier. But physical infrastructure (e.g., power, cooling, mass, and sheer size) will also present significant challenges.

Reconfigurable Computing (RC)--an increasingly mainstream technology--offers an interesting alternative that can address these issues. Based on the Field-Programmable Gate Array (FPGA), RC allows custom computing architectures to be realized on an individual application basis. Specialization, parallelism, and very large on-chip bandwidth are advantages that give FPGA-based solutions high performance in small physical packages.

This project proposes to acquire a 64-node experimental Reconfigurable Computing Cluster to support on-going research projects investigating High-Performance Computing and FPGAs across three universities. Built from off-the-shelf components (plus an inexpensive custom network adapter) and integrated by an experienced industrial partner, TeamHPC, the requested cluster would enable new research that is a natural out-growth of these established research programs.

Researchers will evaluate two novel aspects of the proposed architecture: (a) using FPGAs as the primary processor on the node and (b) integrating the network switching components into the configurable resources of the FPGA. If these enhancements prove valuable, this is a significant step towards cost-effective petascale clusters.

Project is in collaboration with Clemson University and Arizona State University


Faculty Investigator(s): Ronald Sass (PI), David Andrews, Xue-wen Chen

Project Sponsors

Primary Sponsor(s): NSF

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