ITTC Project

Systems Level Design Language (SLDL) Development [Rosetta Tools & Techniques]

Project Award Date: 03-01-2001


The efforts of Perry Alexander and his colleagues indicate that a requirements- or constraints-specification language for systems on chips (SOC) is possible. Until now, the systems industry has cobbled together existing, but less suitable languages. Dubbed the Rosetta Project after the tablets that cracked the code of Egyptian hieroglyphics the group's undertaking in system language development parallels a time in the 1980s when hardware complexity had outstripped the language that tested it. Then along came Verilog in 1983 and VHDL in 1987, two sophisticated hardware languages that stimulated the now multi-billion-dollar ASIC (application specific integrated circuits) industry.

In "Get a Handle on Design Languages," the June 5, 2000, cover story of EDN Access, the technical editor writes that "Rosetta is a constraints-description language that looks similar to VHDL. It allows system architects to describe the system's requirements from various points of view, or 'facets.'"

Alexander also describes Rosetta in terms of a diamond's facets. Just as one diamond has many facets, a SOC is made up of many components. "Rosetta is capable of describing all facets of a system and of understanding how those facets interact with each other," he said.

Alexander is collaborating with AverStar, Inc., in Vienna, Va., and EDAptive, Inc., of Dayton, Ohio; and his work takes ITTC into the new and promising area of investigationthe discipline of language development. Although others in industry and academia are working in this area, Alexander notes that Rosetta is working at a much higher level of abstraction and is integrating existing tools and languages into the work.

EDN Access also notes that the Rosetta team "showed that impressive progress has been made" in developing a requirements- or constraints-specification language.


Faculty Investigator(s): Perry Alexander (PI)

Project Sponsors

Primary Sponsor(s): EDAptive Computing

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